# Sample Makefile -- this is a comment!

# Define a constant the lists all the source files used to build the
# application.
MYFILES = foo.o bar.o

# Define a rule that says myapp depends on MYFILES and if any of MYFILES
# change, then rebuild myapp by running gcc.
myapp : $(MYFILES)
	gcc -o myapp $(MYFILES)
	
# This defines "pattern rule" that says all .o files depend on a
# corresponding .o file.  If the .c file changes, then the .o file should
# be rebuilt using gcc.  The "automatic variable" $< will be replaced by
# the dependency (the .c file).
%.c : %.o
	gcc -c $<